Electronic components within a system may use serializer/de-serializer circuitry to transmit data by way of high-speed serial links. Such high-speed serial links allow for point-to-point data transfers to be made without the need to obtain access to a shared parallel bus.
In order to increase the available bandwidth of a point-to-point link, multiple serial lanes may be included in the link. The theoretically-achievable data rate of a multi-lane link may be computed by multiplying the number of lanes by the data rate of each lane. Hence, a link with eleven lanes at 12 gigabits per second (Gbps) per lane has a theoretically-achievable data rate of 132 Gbps.